In the case of modules composed of printed circuit boards (PCBs) with dimensions smaller than the interference wavelength, it can be assumed that interference collected by PCB traces and interference collected by IC package frames is negligible compared with that collected by connecting cables. Specifically, the amplitude of collected common-mode interference is higher than that of differential-mode interference.¹ Cables will collect common-mode interference, but failures in IC operation occur only if radio-frequency (RF) voltages are present among IC pins. In fact, PCBs translate the common-mode interference into differential mode at the IC pins.

A previous article discussed the nature of problems induced by RF interference (RFI).² This article presents several measurement methods. The workbench Faraday cage (WBFC) method enables evaluation of IC susceptibility to common-mode interference, and the direct-
injection method provides information about IC susceptibility to differential-mode interference. The method using a transverse electromagnetic (TEM) cell allows investigation of IC susceptibility to radiated electromagnetic fields.

The evaluation of IC susceptibility to RFI can be performed by measuring the interference amplitude at the point at which device-under-test (DUT) failures occur. A second criterion consists of measuring the frequency ranges at which DUT failures occur, assuming constant amplitude of the interfering signal. The first criterion enables evaluation of the DUT functional limits due to interference. The second stems from those criteria usually adopted for verification of electrical or electronic device compliance.

The WBFC method was proposed to perform immunity and emission tests of ICs or small electronic modules in the frequency range of 150 kHz–1 GHz.^1,3 The basic concept of this method is taken from the European Norm EN 61000-4-6, which addresses the immunity of electronic equipment to common-mode conducted RFI.⁴ By using this specific method, interference is coupled to the equipment under test (EUT) via coupling-decoupling networks (CDNs).

The WBFC method is based on the hypothesis that the main interference to ICs results from interference collected by cables directly connected to the PCB. A bundle of cables (i.e., a receiving antenna), connected to the DUT in the WBFC, is replaced by the series of an interference source and a radiation resistance, R_g, equal to 150 W. In actual equipment, the radiation resistance depends on cable lengths and geometry, but its average value is about 150 W with standard deviation of 7 dB. A test board, with the DUT soldered on, is inserted into a Faraday cage. Immunity measurements are performed in the cage because most electronic systems require a metal can to reduce thermal and mechanical stresses. Furthermore, the cage allows interference from immunity tests to be confined to the DUT surroundings (see photo), so that interference to the operation of electronic equipment close to the WBFC can be avoided.

Figure 1. Schematic representation of the WBFC for immunity tests.

Figure 1 shows the test setup of the WBFC method. Common-mode filters link DUT, power supply, and auxiliary instruments in the test bench. Each filter is composed of a p cell inserted through a cage wall, in series with common-mode inductors linked by coupled wires wrapped on a NiZn ferrite core (m_r > 1000). The common-mode resistances, R_c1 and R_c2, equal 150 W (see Figure 2) and represent the radiation resistances of the bundles connected to nodes A and B, respectively. Because the bundles connected to each module come from different directions, the RF voltages induced to the bundle terminals have different amplitudes, which is why interference should be injected into one common-mode node at a time, as shown in Figure 2.⁵ In this test bench, the immunity of the IC to common-mode conducted RFI depends heavily on PCB design.

Figure 2. Description of the test bench in the case of common-mode interference applied to the node of common-mode injection (A).

Because the PCB translates the injected common-mode interference into voltages at the DUT pins, it can hide or highlight the DUT immunity to RFI. Furthermore, the test setup in Figure 1 shows some weakness to interference frequencies higher than 300 MHz. In fact, the considerations in IEC 47A are valid until the dimensions of the Faraday cage and those of objects placed into the cage become negligible compared with interference wavelength l. The cage, measuring 0.5 ¥ 0.35 ¥ 0.15 m (length ¥ width ¥ height), behaves as a resonant cavity at the frequencies f_rn = 300 ¥ n and f_rm = 430 ¥ m, with m,ne N. However, the WBFC method aptly simulates real applications because it enables performance of IC immunity tests when the spectra of interference and system signals overlap.

Immunity measurements of ICs can be performed in a workbench Faraday cage.

Direct-Injection Method

In the direct-injection method, the interference is applied directly between a pin of the DUT and the IC ground pin (see Figure 3). The device is soldered onto a test board, and a bias tee circuit gives, in a DUT pin, the interference superimposed on a system signal. IC immunity test results do not depend on test board design. Instead, each DUT pin is characterized in terms of IC immunity to RF power collected by a receiving antenna connected to that pin. A radiation resistance of 50 W and an RF voltage source compose the circuit equivalent to a receiving antenna. The amplitude of the RF voltage source is derived from measurements of the available RF power, which is required to observe failures in DUT operations.

Figure 3. Test bench for direct injection.

This method can be used successfully for narrow-band interference and, in the case of a system signal, for spectral components separated from the disturbance components. This method is limited in that it does not allow the injection of interference on digital signals.

In the previously described methods, system signals were corrupted by conducted RFI. The method using a TEM cell makes it possible to evaluate IC immunity to a radiated electromagnetic field. TEM cell characteristics and the test board design rules are covered in SAE 1752/3, which describes both the test setup and the procedure to evaluate IC electromagnetic emissions.⁶ The TEM cell has an upper aperture with dimensions suitable for the test board into which the DUT can be inserted. The DUT is placed on the layer that functions as a part of the TEM cell walls and is connected to the other layers by vias. The ground layer maintains a contact to the TEM cell wall along the border of the aperture. For guaranteed communication between the DUT and the components and auxiliary instruments, the via interconnections cannot be filtered, which means that the interference generated in the TEM cell will appear outside in the TEM cell's surrounding environment.

Figure 4. Test setup of the TEM-cell method.

The immunity tests must be performed with a test bench such as that shown in Figure 4. By using a TEM cell as described in SAE 1752/3, measurements can be taken in the frequency range of 150 kHz–1 GHz. The automatic test bench enables the operator to control the DUT and the auxiliary instrumentation. The amplitude of the electric field is stepped until DUT failure occurs, and the interference amplitude and frequency and the DUT status are measured.⁷

The test procedures presented in this article are tools to compare RF susceptibility of ICs designed to perform the same function but produced by different semiconductor companies. It should be noted that immunity tests performed at the IC level through one of the previously described methods cannot be correlated with these tests performed on the same IC through the other measurement methods.