Conventional wisdom guides most engineers to resolve emission problems by building a bigger and better chassis enclosure, but most computer chassis in the market are not designed to provide enough attenuation at such high frequencies. Even with superior technology, modifying the chassis to contain the harmonics of a 1.5-GHz cpu, in which typical apertures for airflow become open floodgates for noise, is neither cost-effective nor a simple task. An easier and more effective approach might be to contain noise at the source itself, by enclosing it in a Faraday cage. A study to enclose Pentium IIIs in a Faraday cage, as shown in Figure 1, was conducted, and the results looked good. But before the Pentium III data are discussed, a general discussion of Faraday cage solution space for the next-generation socket microprocessors is presented.

Figure 1. Block diagram of microprocessor module.

Identify and Engage the EMI Source

To be able to define a solution, it is pertinent to first identify the source of the problem. A natural instinct is to point fingers at the highest-frequency component and start defining the solution for that. However, poor package design, unnecessarily fast signal edge rate, and the component power rating can make a 100-MHz-chipset component more deadly than a 400-MHz processor. Possible noise sources can be identified through technology roadmap analysis, product EMI history, and package and process review, among other analyses. It is also important to understand the details of the regulatory guidelines, which define the EMC requirements the device must meet. Regulatory requirements do not cover infinite bandwidth, and the emission limits are different between different frequency bands. Identifying a harmonic and locating it on the regulatory chart is a good start.

It is not possible to get a clear picture of the extent of electromagnetic emissions from a system until the system is up and running with all the pieces in place. Nevertheless, once a system is designed and completed, cost and time constraints make it unreasonable to request changes in its fundamental design. In some cases, guidelines for components and boards to minimize EMI issues do exist, but these general guidelines are not very successful for microprocessors (or any complex circuitry).

Many critical design issues circumvent EMI concerns and precede component layout. For example, decoupling capacitors must be placed close to the socket or microprocessor, and a containment strategy devised after the fact can encounter uncompromising mechanical obstruction due to the placement of these capacitors. And routing of interconnects and buses compound the problem by leaving no wiggle room for the capacitor or any EMI solution. To avoid such problems, it is important to engage EMI early in the design phase. It is also critical to have a good outline of the solution and how the solution should look. All the preliminary research on the possible solution must be complete and simulations made to validate the conceptual design.

After identifying the noise source—in this investigation, the high-speed microprocessor clocks—the next step is to define the containment strategy. It is important to keep the solution structure small to minimize obstruction, reduce electrical impedance for the return path, and, of course, optimize cost and value. Because of the high-frequency emissions from microprocessors, simple grounding of source with single or several contacts will not be very effective.

Microprocessor clocks are several times faster than the clocks on the motherboard, which are typically around 100 MHz or less. Some noise generated by sources on the motherboard is also conducted to the processor, which results in the processor module contributing to nonprocessor noise emissions. What follows is a shielding solution that attempts to attenuate both radiated and conducted processor emissions through proximity engagement with the microprocessor.

The EMI solution design should integrate existing components. This not only reduces the cost of the solution but also reduces manufacturing, material, and production concerns. The initial objective is to cover the processor with a five-sided box and then connect the box (the shield) to the motherboard ground. The ground layer in the motherboard constitutes the sixth side of the box, so that the Faraday cage is constructed around the processor. A typical Faraday cage provides a well-grounded metal structure. (One of the world's largest Faraday cages, made of galvanized steel wire mesh, suppresses emissions from transformers.¹ The concept of an electromagnetic screen has also been extended to shielding mobile telephones and portable electronic devices.)

A typical microprocessor setup consists of a cpu in a package that plugs into a socket or is soldered directly onto a motherboard. In previous setups, the microprocessor was sometimes encased in a module, with the heat sink attached on one side. Such an example is the form factor of the Pentium III Xeon processor module, which is illustrated in Figure 1. The analysis in this article uses that module to develop a Faraday cage containment strategy.

If the processor is not encased in a package, a metal box must be designed to construct the Faraday cage (see Figure 2). It should be noted that the processor interfaces with a heat sink to conduct heat off the silicon. In some cases, the top of the processor silicon interfaces with a metal or conductive plate with a larger surface area to efficiently conduct heat to the heat sink. To maintain minimum thermal resistance between the plate, heat sink, and microprocessor, material such as thermal grease is typically applied at the interfaces. As shown in Figure 2, the metal cage that covers the processor must have a hole in the middle to allow interface between the bottom of the heat sink and the top of the silicon. The hole is designed into the cage, as in most cases adding an extra layer of metal (by virtue of the metal cage) is not acceptable, because it will add thermal resistance and therefore hinder heat flow from the silicon to the heat sink.

Figure 2. Faraday cage solution for a microprocessor.

The bottom of the heat sink represents the top surface of the Faraday cage, and the sides of the metal cage represent the four vertical sides of the Faraday cage. To cascade the Faraday cage from the top to the sides, the periphery of the hole on the top of the cage must make solid contact with the bottom of the heat sink (a metal surface). Springlike metal fingers can accomplish this from the inside. Similarly, the lower periphery of the Faraday cage should make contact with the ground layer of the motherboard, which becomes the sixth side of the metal box encasing the processor. Contact with the motherboard can be maintained with tabs or padded fingers.

The frequency and location of the fingers (or pins) are designed to provide minimum impedance and also maximize containment capabilities for the frequencies concerned. Sufficient pins must be designed to break up potential slot antennas, which are created by the gaps between the pins of the cage.² Although the height of the gap between the lower edge of the skirt and the motherboard ground is very small, the radiation potential of the gap can be quite high. According to Babinet's principle, these gaps can be effectively compared with solid conductors having similar dimensions. The dimensions of the gaps are defined based on the following four parameters: the processor acting as a monopole antenna, the highest frequency the processor can generate, the edge rate of the clock signals, and the critical harmonics of the frequencies.

The finger design ensures that the currents generated on the cage plate are on the inside of the enclosure. Determination of the finger locations depends on two critical issues: interconnect layout and component placement. A cpu will be connected to other chips on the board through a bus, either as microstrips or strip lines. For an effective cage, fingers must be on all sides of the processor. This will conflict with traces routing out of the processor. Therefore, it is important to define the cage before the routing is completed, to accommodate cage requirements. The fingers will typically pressure-contact a pad on the top surface. The pad is connected to internal ground layers with vias. Sufficient vias must be designed per pad to reduce the total inductance per pad contact. By lining the vias parallel with the traces, the number of routing obstructions per pad can be significantly reduced. The contact of the finger to the pad also requires careful examination and tests to determine the nature of the contact. Most such interfaces end up being point contacts. Line contact should be the goal, but it is better to have several narrow fingers than a single wide-finger contact.

To achieve better performance, more components, such as capacitors, are continually being placed closer to the processor. To avoid conflicts, the size and shape of the cage might need to be modified to accommodate the components. However, component placement can also be modified if the EMI requirements are defined well in advance. Due to the high-power nature of today's microprocessors, proper airflow for cooling of chips is important. Therefore, the cage should be designed not to obstruct airflow.

Another critical observation is the effect of the metal cage on the package dielectric due to possible close proximity with the routing within the processor package. For example, if a trace is routed on the top layer of the processor package, the placement of the metal cage too close to the top of the package could be potentially damaging. The metal layer can change the impedance profile of the top layer traces and cause the signal integrity to be compromised. Simulations can identify the boundaries of such a problem.

Once a solution has been defined, it is critical to use high-frequency simulation tools for optimization. There are several such tools on the market. Engineers should evaluate particular application needs. Tool use can determine the minimum required number of pins and the effect of pin distribution on the emission profile of a source within the cage. The tools are better used for a qualitative evaluation than for a quantitative measurement of the design and should cover all the frequencies of concern.

The ultimate test of the design, without the actual system, is the validation of the cage prototype in a test setup. For the source, a device can easily be built with a clock chip to generate frequencies similar to those the device is expected to face. The system emissions can then be measured by using a simple spectrum analyzer or running scans in a 3-m semianechoic chamber (or even in a dreaded open-area test site). Mechanical and structural tests also identify weaknesses of the cage, such as bad contacts to the pads.

A test to reduce emissions was performed on the Pentium III Xeon processor module.³ The module was modified into a five-sided metal box (the shield), with the sixth side being the ground layer of the motherboard. During application, the module was plugged into a connector attached to the motherboard.

The side of the module with the heat sink had a metal (thermal) plate. However, the covers of the module were made of nonconducting resin. Two options were available: replace the resin cover with a metal cover, or coat the inside of the cover with conductive coating. The latter was cheaper and easier to execute, but studies had to be done to find a paint that would neither flake nor peel off the cover, which could potentially short-circuit traces or pins on the module or the motherboard. It was also necessary that product aging not deteriorate the paint quality. A silver-based copper paint met the requirements. The mating interface of the module cover and the thermal plate also needed a solid connection (see Figure 1). A resin cover had the flexibility to enable the necessary mating contact.

The next step in the design was to provide a mechanism by which the metal enclosure could be efficiently grounded to the motherboard. A grounding mechanism must be executed outside and around the socket. A skirt was designed to hug around the connector wall. The skirt had legs around the connector, soldered into through-holes on the motherboard. When the module was plugged in, springlike fingers on the side of the wall made contact with the inside of the processor enclosure.

Mechanical considerations were also critical. Processor modules can typically be upgraded, which means the skirt should not be damaged when the module is taken out and reinserted. And this should be a repeatable exercise. If any of the fingers break or bend, it might become necessary to remove the skirt and resolder a good one back to be able to reinsert modules. The illustration in Figure 3 shows the cross section of the EMI solution assembly. Careful design consideration had to be given to making the skirt design robust, with fingers properly shaped to reduce the chance of damage. The prototype EMI skirt was built of tin-plated beryllium copper. The thickness of the sheet metal was designed to make the skirt strong to reduce the chance of buckling. The result is a skirt wrapped around the connector to provide complete enclosure characteristics—a Faraday cage.

Figure 3. Application of the EMI skirt.

Figure 4 presents data showing the effectiveness of the EMI skirt containment strategy. The test system configuration had two processors plugged into the motherboard of the server system. Initially, a baseline emission was recorded to characterize the system signature. The processors in this experiment were running at 450 MHz with critical harmonics at 900, 1350, and 1800 MHz. Another set of data was collected to characterize the system emissions without the processor plugged into the motherboard but with the power supply turned on. Without any processors in place, there was no front-side-bus activity (read/write between the processors and memory). Bus activities are not typically continuous and therefore do not have sustained emission levels. The most significant signal on the board is the clock, and that component must be active. The graph shows that the emissions at 900 and 1350 MHz increased significantly, by 10 to 20 dB, when the processors were plugged in. These emissions were primarily due to the processor. Any shifts in the emissions at other frequencies were in part due to the interaction between the processor and the other components and conducted emissions.

Figure 4. System emissions with cpu at 450 MHz.

The third data set shows the emissions with the EMI skirt in place. The emissions at several frequencies were significantly reduced. These frequencies were the harmonics of the processor, and the suppression was between 8 and 10 dB at each. It should be noted that the EMI solution did not reduce emissions proportionately at all frequencies because the shield that the EMI skirt helped complete attenuated emissions only from the shielded component (i.e., the processor).

When designing a microprocessor EMI solution, all future microprocessor products for the target system should be considered. Products will have upgrades in which the cpu frequency could increase significantly, among other factors. It is not feasible to redesign the EMI solution, which would likely require modification on the motherboard such as trace rerouting or component relocation, both of which are generally unacceptable. Also, recall of products already in the marketplace to make further changes will not be a possibility.

An important philosophy for successful EMI design is early engagement with the product. Most EMI violations can be easily avoided with simple design modifications, trivial at the beginning but gargantuan at the end of the design cycle. The concept is applicable not only to processors but also to any continuous or repetitive waveform generator component, such as a clock chip. Most current structures on the motherboard are metal because they are needed for both structural support and thermal considerations. This is the basic ingredient for EMI reduction and should be used. Also, the Faraday cage solution should not inhibit other components or functionalities. It should be removable if not needed and user-friendly so that every user can deal with the cage when there is a need to upgrade a component.