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SPICE Simulation: Low-Capacitance TVS Devices for High-Frequency Applications

David W. Hutchins

SPICE modeling can be used to build a more-effective protection network that provides both transient immunity and noise filtering.

Today's circuits and systems cannot be designed without consideration of industry standard requirements. Not only must the design engineer carefully weigh the effects that each component will have on the performance of the circuit or system, but the design must also meet electromagnetic compatibility (EMC) immunity requirements. A variety of options are available for EMC protection. This article addresses low-capacitance transient-voltage suppression (LCTVS) devices. LCTVS devices can provide simple, space-saving, cost-effective protection against EMC threats such as electrostatic discharge (ESD), electrical fast transients (EFT), and induced lightning.

Selecting an LCTVS device can be difficult. To ease the process, LCTVS manufacturers can provide simulation program with integrated circuit emphasis (SPICE) parameters and models, from which accurate circuit-performance analyses for all types of high-speed applications can be determined. Such circuit simulations can offer valuable insight on device performance, including the way in which the device operates under specific circuit conditions with known source and load impedances.

LCTVS devices are composed of avalanche breakdown diodes (ABDs) and low-capacitance rectifier diodes (LCRDs). Unlike most p-n junction components, these two types of diodes have unique SPICE parameters that are not normally included in circuit simulation software. For instance, ABDs have a larger junction capacitance (Cj) for high current-handling capability and lower series on-resistance (RS) for low clamping voltage. The SPICE parameters for a particular ABD or LCRD are determined by each manufacturer. These parameters include breakdown voltage (BV), junction capacitance, and saturation current (IS). The first three columns of Table I show the SPICE parameters that are included in a typical circuit simulation using an LCTVS device.

Parameter Symbol Units ABD (TVS) LCRD
Breakdown voltage Bv V 6.0 200
Current at breakdown IBv µA 1 0.01
Junction capacitance Cj pF 140 5
Saturation current IS µA 10E–14 10E–14
Forward junction voltage Vj V 0.6 0.06
Grading coefficient M 0.33 0.33
Emission coefficient N 1 1
Series resistance Rs W 0.18 0.31
Transit time TT µs 0.1 1
Activation energy EG eV 1.11 1.11
Table I. SPICE parameters for a typical TVS device and for the PSLC05C (LCTVS).

A SPICE model of a single LCTVS device is shown in Figure 1. To ensure accurate circuit-simulation analysis, this model also includes the internal lead inductance (Lg) for this LCTVS device. Lead inductance varies depending on the internal package structure of the given LCTVS device.

Figure 1. Typical SPICE model for a single-line LCTVS device.

The PSLC05C, for example, is a single-line, low-voltage, bidirectional LCTVS device in a SOT-143 package. This particular LCTVS has a pair each of ABD and LCRD devices that are configured in parallel but with opposite polarities. Table I shows the SPICE parameters for both ABD and LCRD components for the PSLC05C. Figure 2 shows the SPICE model for the PSLC05C with a lead inductance (Lg) of 0.65 nH. A 50-W source impedance (RS) and 50-W load impedance (RL) have been added to represent a simple circuit model under ideal conditions. V1 represents a sweep generator (0–3 GHz) for a 0–5 V signal.

Figure 2. SPICE model for PSLC05C: Lg = 0.65 nH, Rs = 50 W, RL = 50 W .

The black curve on Figure 3 shows the insertion loss for the circuit performance of the PSLC05C. At 500 MHz, the insertion loss is approximately –8 dB; at 1.0 GHz, the insertion loss is approximately –13 dB; and at 1.5 GHz, the insertion loss is approximately –21 dB. The addition of an LCTVS device into the circuit configuration affects the performance of the circuit in terms of its insertion loss. However, by changing the source impedance to 15 W, the circuit performance improves at the lower frequencies of the circuit. A 15-W source impedance was selected to illustrate the effect lowering the source impedance has on the insertion loss.

Figure 3. Insertion loss for PSLC05C.

A lower insertion loss has the greatest effect below 100 MHz. This change does not affect the circuit's resonant frequency, but it does improve the insertion loss with a steeper roll-off characteristic at higher frequencies. Figure 4 represents the SPICE model for the PSLC05C with a 15-W source impedance, 50-W load impedance, and 0.65-nH lead inductance (Lg). As with the previous SPICE model, V1 represents a sweep generator (0–3 GHz) for a 0–5 V signal.

Figure 4. SPICE model for PSLC05C: Lg = 0.65 nH, Rs = 15 W, RL = 50 W.

The lavender curve on Figure 3 shows the improved circuit performance of the PSLC05C with the altered source impedance. Insertion loss at 500 MHz is approximately –3 dB; at 1.0 GHz, it is approximately –5 dB; and at 1.5 GHz, it is approximately –11 dB.

Figure 5. SPICE model for PSLC05C: Lg = 0.65 nH, Rs = 15 W, RL = 1000 W.

Figure 5 depicts the SPICE model for the PSLC05C with a 15-W source impedance, 1000-W load impedance, and 0.65-H lead inductance. V1 represents a sweep generator (0–3 GHz) for a 0–5 V signal. In addition, a 3-nH inductor (L0) and a 5-pF capacitor (CL) have been added to the simulation to represent an ideal complementary metal-oxide semiconductor (CMOS) load (input circuit).

The red curve on Figure 3 shows the improved circuit performance of the PSLC05C with both lower source impedance and the addition of external components. The insertion loss at 500 MHz is approximately –3 dB; at 1.0 GHz, it is also approximately –3 dB; and at 1.5 GHz, it climbs to approximately –5 dB.

Filter Combination Networks

LCTVS devices are increasingly being designed into systems for compliance with immunity requirements in standards such as IEC 61000-4 (EN 61000-4) and GR-1089. These standards are just part of the protection requirements. EMC standards include both radiation emission and transient immunity requirements. Adding passive components to LCTVS device designs provides transient immunity and reduces conducted EMI/RFI, radiated emissions, and noise. This type of protection network is a cost-effective solution for protection against these types of disturbances.

An LCTVS clamps the transient voltage. The combination of passive components reduces noise disturbances. SPICE simulations provide the tool to design a protection network for each circuit application. By using SPICE modeling, LCTVS devices can be designed with passive components to provide both transient immunity (voltage clamping) and noise (EMI/RFI) filtering. Without SPICE modeling, it is difficult to design a protection network that offers these two functions in a single package.

In addition to clamping transient events, the capacitance of an LCTVS device serves as part of a T or pi filter network. Designing an LCTVS–filter combination network using SPICE models and parameters provides a cost-effective method of defining a total protection system without repeated costly printed circuit board (PCB) fabrications for each design.

SPICE modeling also reduces ringing, the overshoot and undershoot voltages that threaten noise margins of sensitive integrated circuit (IC) components. This section shows various solutions using specific passive components with an LCTVS device to design TVS–filter protection networks.

Figure 6. A block diagram of a basic TVS–filter design for a 50-W (resistance) source and lead.

Figure 6 is a block diagram of a basic TVS–filter design for a 50-W (resistive) source and load. The source resistance (RS) represents a line driver circuit or a transmission line. The load resistance (RL) represents a transceiver input component. The TVS low-capacitance block is an LCTVS device with a capacitance value of <10 pF. The filter stage is a 10-W series resistor and a 5-pF parallel capacitor, completing the circuit for a pi filter. The lead inductance (Lg) represents either lead inductance from the TVS–filter combination package or trace inductance from a PCB.

Figure 7. Insertion loss for the basic TVS–filter combination circuit in Figure 6. For the GBLC product series, RS = 50 W and RL = 50 W.

Figure 7 shows the insertion-loss curve for the basic TVS–filter combination circuit shown in Figure 6. The actual curve is dependent on the circuit model and component values. Changes in component values will depend on the design and performance of the system. With this design, the TVS device provides the necessary voltage clamping and becomes one leg of the low-pass pi filter. The passive components complete the elements for good filter design.

Through SPICE simulation programs, the ideal system circuit design components can be changed easily to represent actual source and load impedance values. To maintain a high signal value at lower frequencies, the source resistance can be lowered from 50 to 15 W for each additional circuit model. Both source and load conditions should be representative of the actual, complex, parasitic line-inductance and capacitor values.

Selecting Passive Components

Using SPICE modeling for circuit analysis is recommended not only for selecting the appropriate LCTVS device, but also for selecting passive components for the filter stage. However, at low frequencies (below 500 MHz), an LCTVS device may not be required. Even in this case, though, it is important to include all SPICE parameters of a TVS device in addition to its capacitance value.

An example of a filter using standard TVS devices is shown in Figure 8, represented by the diode symbol, inductors (0.4 and 0.5 nH), and a 1-W resistor. However, the primary TVS and LCTVS device parameters that have the greatest effect on device selection are their capacitance and lead inductance. Although the TVS and LCTVS device parameters will change for the most part, the source and load impedances are fixed for the circuit examples in this article.

Figure 8. A simple pi filter using two standard TVS devices with a 25-W series resistor between the diodes.

Figure 8 illustrates a simple pi filter using two standard TVS devices with a 25-W series resistor between the diodes. The TVS devices, which provide voltage clamping from both directions, also provide the necessary capacitance for the pi filter. Because TVS devices are not low capacitance, this TVS– filter combination is considered appropriate for low frequencies, that is, below 500 MHz. The –3-dB point can, however, be changed with the addition of a low-capacitance TVS device as shown in Figures 9a and 9b. With this type of filter, there is a gradual roll-off characteristic.

Figure 9. The addition of low-capacitance TVS devices causes a gradual roll-off.

Another simplified TVS–filter stage network is a classic resistor-capacitor (RC) pi filter (see Figure 10). For this network, the LCTVS device is represented by two LCRD and two ABD TVS devices. The 0.5 nH represents the package lead inductance. The LCTVS diode capacitance is 10 pF. In this example, four diodes must be considered, each with its own SPICE parameters.

Figure 10. A classic RC pi filter.

SPICE programs can characterize the combined TVS–filter network components. These networks always contain package lead inductance that has some nominal value. Package lead inductance affects the circuit frequency response, and, therefore, it should always be included as a passive component value.

Adjustments can be made in the passive components during SPICE modeling, and different TVS devices can be used to achieve the desired results. Figures 11a and 11b show the insertion loss for two different capacitance values for an LCTVS device. With few exceptions, a PSLC05C device was selected for each filter stage for this analysis.

Figure 11. The insertion loss for two different capacitance values for an LCTVS device.

RC-type filters are used in many circuit applications for suppressing noise coming from either direction. Another TVS–filter combination employs low-capacitance devices at both the input and output stages (see Figure 12). The LCTVS device in this case is unidirectional for unbalanced lines.

Figure 12. A TVS–filter combination with low-capacitance devices at the input and output stages.

A more correct representation of a TVS device would have lead inductance in each terminal (pin out). Therefore, a low-value inductance should be included at each terminal pin. This produces yet another frequency response for the previous RC network. The –3-dB point shifts to the right, with an upper frequency limit greater than 1 GHz. This network filter improves the operating frequency of the filter. Analysis tools and SPICE parameters enable designers to model a variety of TVS–filter iterations to determine the optimal circuit protection network.

RC components, however, must be adjusted to obtain a desired frequency response for given circuit source and load impedances. SPICE modeling provides a quick check to determine capacitor values required for various load impedances. With any SPICE program, it is important to define the load impedance in terms of the resistive and capacitive values for a given circuit.

The more complex the TVS–filter combination network, the more important SPICE analysis becomes. Complex circuits do not always provide the hidden component characteristics—parasitic inductance and capacitance. Once a network has been designed and fabricated, it should be tested on a network analyzer to confirm filter performance. Figure 13 shows a more complex TVS–filter combination circuit. Unlike the previous examples, this combination filter simulates a T configuration with two TVS devices at each I/O port terminal. The source and load resistances were changed to provide the best insertion-loss characteristic.

Figure 13. A TVS–filter combination with a TVS device at each input-output port terminal.

Figure 14 shows the filter's performance with a pure resistive load. With the addition of the capacitor, the shift in performance is very slight. It is important to note that the loss of signal value is at the lower frequencies. At the lowest frequency, the signal is already down by –6 dB.

Figure 14. Filter performance with a pure resistive load. Adding a capacitor shifts performance only slightly.

Resistive Loads

Inductive and capacitive filter stages are designed for resistive loads. It is also possible to achieve a steeper roll-off with an inductor-capacitor (LC) network. However, these filter stages make the circuit more confusing. Figure 15 shows a more complex configuration that uses additional inductance and capacitance to achieve a desired result. In this example, one of the objectives was to look at TVS devices and filter stages for use in higher-frequency applications. Specific component values can vary to increase the frequency response.

Figure 15. Additional inductance and capacitance can be used for higher-frequency applications.

The insertion loss of a given network changes with different resistive, inductive, and capacitive component values. There is a significant change in the –3-dB point for these two networks. However, when the LCTVS device capacitance is reduced, there is only a slight change in the cutoff frequency. For this type of filter network, the need for SPICE modeling is even more critical.

Conclusion

LCTVS devices and circuit source and load impedances have a definite effect on frequency response (insertion loss). When TVS devices and passive components are integrated into protection networks, it becomes important to simulate circuit performance through SPICE modeling for two primary reasons. First, it is important to determine the performance characteristics of the circuit before designing and fabricating a costly PCB. Second, with the integration of TVS devices and filter components into a single package, product redesigns are also costly.

ESD and EFT protection devices and noise filtering can be combined into a single package for cost and space considerations. It is important not only to model TVS–filter performance but also to define the component values to be used in a combination protection-filter product for each application. Insertion loss and return loss can be improved in any application.

In all instances, the introduction of an LCTVS device into the circuit affects the insertion loss by some amount. However, by changing the source and load impedances and adding external components to better simulate real load devices, the performance of the circuit improves, exhibiting lower insertion loss than before. Typically, changes in source impedance reduce insertion loss. The addition of external components into the SPICE circuit to represent a real load creates a sharper cutoff frequency (–3 dB) point.

High-speed circuits and systems by nature are susceptible to performance degradation. Each component that is added to the circuit or system causes some degree of insertion loss. LCTVS devices are no different. However, LCTVS devices may need to be designed-in to help ensure that a circuit system meets EMC immunity requirements. In the early stages of design, a complete circuit analysis using the LCTVS manufacturer's SPICE parameters can aid in defining the frequency response of a specific circuit or system.

David W. Hutchins is an engineer with ProTek Devices (Tempe, AZ). He can be reached at hutchins@protek-tvs.com.