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feature article

Certifying Process Equipment and Minienvironments with SEMI E78-0998

The electromagnetic compatibility guide offers test methods and recommendations for minimizing static buildup and EMI.

A few years ago, minienvironments were enclosures that surrounded semiconductor process equipment. They were regarded as an addition to the process tool. Minienvironments are now considered an integral component of the tool, and their filters are often housed within the tool chassis.

The semiconductor industry certifies minienvironments and process tools to assure that particle levels are under control. Commonly run tests include measurements of pressurization, air velocity, airborne particles under both static and dynamic operating conditions, particles per wafer pass, recovery times, and induction; filter leak scans; and airflow visualization. Particles, however, are not the only contaminant of concern.

Static charge must be included in the list of minienvironment contaminants because of its effects on manufacturing processes. Enhanced attraction of particles to surfaces, electrostatic discharge (ESD) damage, and equipment malfunctions are the primary results of uncontrolled static charge in the process environment. Recognizing the negative impact of static charge on semiconductor manufacturing, Semiconductor Equipment and Materials International (SEMI) issued in September 1998 its standard E78-0998, an electrostatic compatibility guide for equipment.1 The E78 Guide contains test methods and static control recommendations intended to help ensure that static-charge problems in equipment and minienvironments will be minimized. While it was produced by a semiconductor organization, its methods are equally applicable to other sectors of electronics manufacturing, including the disk-drive and flat-panel-display industries.
 

Static-Charge Problems Addressed by E78

Particle Contamination. In the semiconductor industry technology roadmap, there is an obvious trend toward reducing both the size and the number of particles. Both the critical particle size and the allowable defect density shrink with each technology generation. Figure 1 shows the gravitational, diffusional, and electrostatic forces that contribute to particle deposition on wafer surfaces. As particle size decreases, deposition due to static charges dominates over that produced by other forces. Analysis shows that three factors determine static-related particle deposition onto the product surface: ambient particle level, exposure time to the ambient, and the electric field due to charge on the surface. Reducing the static charge enables processing in areas that produce particles, allowing longer exposures to the ambient while maintaining acceptable particle contamination levels. Table I, adapted from the E78 Guide, displays the relationship between the three factors at Federal Standard 209E Class 1 levels.1,2

 

Figure 1. The speed of particle deposition in relation to particle size, as affected by gravitational, diffusional, and electrostatic forces.

 

ESD Damage. An ESD event is the rapid, spontaneous transfer of electrostatic charge induced by a high electrostatic field, usually occurring between objects at different electrostatic potentials. Although the amount of static charge transferred is usually small (on the order of nanocoulombs [nC]), a discharge deposits its energy into a very small area of a device in a very short time (typically in nanoseconds). This vaporizes the metal lines or silicon, punches through the oxide layers, and causes other damage. ESD events can also damage production tools such as photomasks and reticles. While ESD causes random defects in products, the defects can also be repeatedly patterned onto multiple wafers when ESD affects reticles and photomasks. ESD can also cause latent failures—cases where the device is weakened, but not so much as to completely destroy its functionality. Such damaged products may pass initial quality tests and then fail prematurely in the field. Field failures are extremely costly for manufacturers to repair or replace. Figure 2 depicts examples of ESD damage.3

 

Figure 2. ESD damage to (a) a product and (b) a reticle. (Photos courtesy of Lockheed Martin (a) and KLA-Tencor (b).

 

Equipment Malfunctions. ESD events produce electromagnetic interference (EMI). The charge associated with static electricity is quite small, but an ESD event happens in just a few nanoseconds. The resulting ESD current can produce EMI over a wide frequency band, from 10 MHz up to 2 GHz. These high-frequency signals affect microprocessors operating in the same frequency range, corrupting instructions as they are read from memory or changing the data being analyzed. As microprocessor clock speeds increase, the microprocessors become more susceptible to EMI. This means that semiconductor fabrication facilities today are experiencing lockup more frequently, and the problem is only going to get worse.

Equipment lockup is often misdiagnosed as a software or hardware problem, when ESD-induced EMI may be the true culprit. Since EMI is both radiated and conducted from the site of its occurrence, the ESD event may not be happening in the equipment experiencing the problem. This makes the event especially difficult to locate, reducing equipment availability and product throughput.4

The E78 Guide specifies that processing within equipment and minienvironments should not produce levels of static charge that are potentially harmful to products, reticles, or the equipment itself. Determinations of these levels were based on studies of real factory situations that are presented in the guide. Standard E78-0998 suggests monitoring equipment operation to be sure that these problems are eliminated. Table II presents a matrix of recommended sensitivity levels for static-charge control. For each type of static problem there are four levels, depending on the particle deposition limits, and the ESD sensitivity of products, reticles, or equipment.

E78-0998 Guide Sensitivity Level
E (V/cm @ 2.5 cm)
N/A (defects per cm2

Velect
(cm/sec)

ct (sec/cm3)
max t in Class 1 (sec)
Level 4 4000 0.016 0.21 0.0762 61
Level 3 400 0.016 0.021 0.762 610
Level 2 200 0.016 0.0105 1.524 1220
Level 1 100 0.016 0.00525 3.048 2440
1 Defect density for 0.25 = µm technology.
2 Product exposure time under Class 1 conditions.
Table I. E78 Guide contamination levels, showing the relationship between factors that affect static-related particle deposition.

Because minienvironments and equipment isolate the process step from the cleanroom air, static control methods applied to the cleanroom environment will not address problems caused by static-charge buildup inside the tools. Static control equipment must be placed inside the minienvironment and tools in order to control static charge within those spaces. The loading zone is a logical place to start and is the focus of SEMI Standard E78-0998. It is preeminently logical to include static control in the tool design. The E78 Guide creates a dialogue between equipment/minienvironment users and suppliers by providing a test methodology to demonstrate a static-safe environment.

 

Applying the E78 Guide

E78-0998 considers three effects on production yield and reliability, each of which is measured and categorized into the four levels shown in Table II.

 
ESD (nC)
Contamination (V/cm)
Equipment Malfunction (nC)
Level 4
100
4000
1200
Level 3
50
400
600
Level 2
10
200
300
Level 1
1
100
150
Table II. SEMI E78-0988–recommended sensitivity levels for static-charge control.

How strong is the particle attraction to the product? Charged surfaces and products attract particles better than uncharged surfaces and products. The strategies available to minimize particle deposition are to reduce the charge level, to provide cleaner air, and to minimize exposure time.

How sensitive are products and reticles to ESD damage? A number of industry test methods are used to characterize the ESD sensitivity of devices. Those commonly known as the Machine Model and the Charged Device Model are the most relevant to minienvironments and equipment.

How sensitive is the tool itself to an ESD event? Most equipment is characterized with respect to ESD immunity in order to meet government regulations.

The EMI associated with ESD can confuse the microprocessor, leading to equipment stoppage, data errors, or incorrect movements. These effects are easily misdiagnosed as software bugs. They have costly ramifications, since product loss and equipment downtime increase cost of ownership.

The first step in applying SEMI Standard E78-0998 is to determine the nature of the static-charge problem and the level at which it occurs. Is the issue ESD or particle contamination? Are products or reticles being damaged? Is it an equipment malfunction that must be prevented? In some cases there may be multiple problems. After establishing the level at which the problem occurs, users can choose an appropriate E78 sensitivity level from the matrix of Table II. The E78 Guide recommends taking measurements of charge by means of a Faraday cup, and using an electrostatic field meter to gather measurements of the electric field. Because it is difficult to specify the application of static control throughout a particular process inside the equipment, charge levels are usually monitored at the input and exit ports of the tool.

In an ideal world, products would always arrive at the equipment or the minienvironment with zero charge. The equipment suppliers would then deal with any charge generated in their process and assure that charges on the products leaving through the exit port are at acceptable levels. In actual practice, suppliers must deal with products and product carriers that arrive with unknown, non-zero-level static charges, and static control methods employed with their equipment must take that into account.
 

An Example of Particle Attraction (Quantified as Maximum Exposure Time)

The electric field produced by charged objects increases the deposition rate of particles onto the charged objects. The number of resulting particles per unit area (N/A) is dependent on the electric-field strength (E) near the object, the concentration of particles in the ambient (c), and the exposure time of the charged object in the ambient (t). These are all related by the equation
 
N/A = kctE
 
where k is a constant that depends on the particle charge.
 
The current technology roadmap for semiconductors contains targets for N/A (defects per square centimeter at a given feature size) and c (particles per cubic centimeter, depending on the cleanroom class). The E78 Guide gives calculations made for an assumed particle charge distribution, 0.25-µm technology, and FS 209E Class 1 cleanroom conditions. Given a known exposure time, allowable electric-field strength may be calculated. Alternatively, exposure time may be calculated from an electric-field measurement. Figure 3 is a plot of the four sensitivity levels of the E78 Guide with the corresponding exposure time in both ISO and FS 209E Class 1 environments.5

In a study, an electrostatic field meter was used to survey the load-port area of operating production equipment in an effort to understand which surfaces become charged during normal manufacturing operations. Particular attention was paid to equipment components that contacted the wafers or cassettes or that were composed of insulators. An ionizer was used to neutralize the entire load-port volume, including two cassettes of wafers. Field meter measurements were then made to assure that all surfaces were initially uncharged.

 

Figure 3. Maximum recommended product exposure time relative to electric-field measurements (adapted from SEMI E78-0998, Appendix 1). Values are based on studies targeting fewer than 0.016 defects per square centimeter for 0.25-µm technology. (a) Maximum recommended exposure time in seconds for an ISO Class 1 environment. (b) Maximum recommended exposure time in seconds for a Federal Standard 209E Class 1 environment. (c) Electric field in volts per centimeter at 2.5 cm (measured values).

 

Figure 4. Electric-field measurements taken during a test with operating production equipment and plotted against E78 sensitivity levels and maximum recommended exposure times (inferred values) for an FS 209E Class 1 environment.

 

A 2-hour test was performed in which five wafers passed through all the normal process steps at a typical throughput rate. At the end of the period, the wafers, cassettes, and equipment load-zone surfaces were measured again with the electrostatic field meter. The field-meter measurements are charted in Figure 4 and compared with the sensitivity levels of E78.

Measurements of wafers removed from the cassette showed a static charge of 200–400 V/cm. This suggests that exposure times of 10 to 20 minutes in a Class 1 ambient are acceptable. The cassettes themselves, however, averaged 2300 V/cm. If wafers are placed into charged cassettes, a charge of the same polarity as that on the cassettes will be induced on the wafers. The charged cassette lowers the maximum exposure time in a Class 1 environment to roughly 2 minutes. Many other factors, such as the position of wafers at the ends of the cassette, will affect particle levels on wafer surfaces, but it is clear that additional defects may be caused by the charge on the cassette.

The measurements of charge accumulation on the equipment parts varied from 250 to 2500 V/cm. While this does correspond to some allowable exposure time, the interpretation is different than with the exposure time for wafers. Equipment parts are continuously exposed to the ambient particle level and will accumulate particles over a period of time. These particles will be released and become airborne whenever the equipment parts move or make contact with other objects, possibly leading to product defects. An analysis of particle deposition rates in the E78 Guide reveals that, for all practical purposes, an electric field of 50 V/cm will double the deposition rate of small particles. Equipment parts will need to be maintained at as close to zero charge as possible in order to minimize particle deposition.

Class
Voltage
0
<250
1A
250-499
1B
500-999
1C
1000-1999
2
2000-3999
3A
4000-7999
3B
> 8000
Table III. Human Body Model classification levels for testing the ESD sensitivity of devices, reproduced from Appendix 1 of the E78 Guide.


Class
Voltage
C1
<125
C2
125-249
C3
250-499
C4
500-999
C5
1000-1499
C6
1500-1999
C7
> 2000
Table IV. Charged Device Model classification levels for testing the ESD sensitivity of devices, reproduced from Appendix 1 of the E78 Guide.


Monitoring Equipment Operation to Prevent ESD Damage

To illustrate the process of using SEMI E78-0998 to qualify equipment, another test was run. Five wafers were placed in each of two wafer cassettes. The equipment was first run for 3 hours to demonstrate stable tool operation.

Prior to taking Faraday cup measurements, handling tests were run to confirm that wafer handling did not significantly affect the measurement method. This was necessary because wafer transfers can impart very high charges if not performed carefully. A good rule of thumb is to keep charge accumulation due to the measurement method below 5% of the total measured charge. The limit will depend on the compliance level sought. Calibration of the Faraday cup was verified through analytical recovery of known charges in the range of interest. The Faraday cup had a 300-mm diameter to accommodate the wafers and cassettes.

The wafers and cassettes were neutralized with ionized air at the beginning of the ESD damage test. Measurements with the Faraday cup confirmed an acceptable background charge level. Each of the 10 wafers was passed through the system and measured. Figure 5 presents a plot of the charge levels on the two cassettes and on five wafers taken from one of them, with the four sensitivity levels for ESD damage specified in the E78 Guide given for comparison.

 

Figure 5. Charge generation on two cassettes and five wafers from cassette #1, measured through use of a Faraday cup.

 

All charge measurements in Figure 5 were below level 3 as defined in E78. This means that the equipment is capable of handling most semiconductor products with moderate sensitivity to static charge. It is appropriate for handling products that pass Human Body Model Class 1A testing or Machine Model Class M4 testing. Since both the cassettes and the wafers are insulators, and because it is not likely that all their charge could be transferred in a single ESD event, the ESD hazard from these objects is probably much lower than the Faraday cup measurement indicated.

The amounts of charge generated on the wafers themselves were below level 2, corresponding to better than the Charged Device Model C1 levels. Given that the wafers are insulators, there is fairly little chance of ESD damage to the wafer surface, even if the wafer should contact ground. The device damage levels from E78 Appendix 1 are reproduced in Tables III, IV, and V.

Reducing the Probability of ESD-Related EMI

Charge levels on wafers, masks, devices, and cassettes can be measured directly with the Faraday cup. Measured charge levels can be compared to ESD simulator discharges used to test equipment EMI immunity. But to obtain Faraday cup charge measurements of equipment components in order to estimate how much EMI would result from a discharge from them is often difficult. Equipment parts must be disassembled and transported to the Faraday cup, which inevitably alters their charge levels. Charge levels on insulators do not relate directly to EMI either, because charge on insulators is not mobile and these devices cannot be completely discharged in a single ESD event.

In an effort to take EMI-related measurements from equipment parts and cassettes, the electric-field strength at various locations within the load zone was measured by means of a field meter calibrated at 1 in., as shown in the shaded areas of Figure 4. For purposes of this analysis, it was assumed that the measurements, in volts per inch, in the worst-case scenario were to equal voltages on charged conductors whose capacitance to ground was 150 pF. This is the capacitance in the simulators used in the ESD-immunity testing document IEC 61000-4-2 that is referenced in the E78 Guide ("Electromagnetic Compatibility ([EMC]), Part 4: Testing and Measurement Techniques, Section 2: Electrostatic Discharge Immunity Test," 1995). The equipment measurements from the shaded areas of Figure 4 have been replotted against the E78 sensitivity levels for equipment in Figure 6.

 

Figure 6. EMI sensitivities of equipment. The measurements from Figure 4 are plotted against the E78 equipment sensitivity levels. Testing was based on IEC 61000-4-2 (referenced in E78).

 

Static-charge buildup on the cassettes and doors fell between E78 sensitivity levels 3 and 4. This level of charge buildup is probably acceptable, given the worst-case assumptions that were made. Most equipment can pass a direct-contact discharge test of 4 kV and an air discharge test of 8 kV (based on IEC 61000-4-2); this is required for equipment with a CE mark sold to European countries. Failure to pass the tests is an indication that equipment interruption may occur. Types of interruption include equipment stoppage, data errors, product mishandling, and other problems usually attributed to software defects.

The E78 Guide sensitivity level 3 corresponds to the IEC 61000-4-2 test levels. It would be good manufacturing practice to install additional static control equipment in the load area of this tool to bring the charge generation below level 3. The charge levels on the load platforms and cooling station were low enough not to require further ESD control. Additional static control would be useful in these areas if contamination or ESD-damage issues existed.

Class
Voltage
M1
<100
M2
100-199
M3
200-399
M4
>400
Table V. Machine Model classification levels for testing the ESD sensitivity of devices, reproduced from Appendix 1 of the E78 Guide.


Conclusion

An effective static control program produces benefits for semiconductor manufacturing, including dramatic reductions in reticle ESD damage, surface contamination, and equipment malfunction. A good program comprises the grounding of all conductors, the use of dissipative materials wherever possible, and the use of air ionizers to diminish the level of static charge on insulators.

The static control program must start before the equipment is delivered to the factory. Recognizing this, SEMI has issued an electrostatic compatibility guide, its standard E78-0998. The guide provides users and manufacturers of production equipment with a methodology for designing in and verifying good electrostatic performance. The goal is to ensure that equipment operations will neither produce static-charge levels that can damage product nor create EMI that can reduce equipment efficiency.
 

References

  1. "Electrostatic Compatibility: Guide to Assess and Control Electrostatic Discharge (ESD) and Electrostatic Attraction (ESA) for Equipment," SEMI E78-0998, Semiconductor Equipment and Materials International (September 1998), Mountain View, CA.
  2. DW Cooper et al., Deposition of Submicron Aerosol Particles During Integrated Circuit Manufacturing: Experiments, IBM Research Report (Yorktown Heights, NY: IBM Research, 1989).
  3. J Wiley and A Steinman, "Investigating a New Generation of ESD-Induced Reticle Defects," MICRO 17, no. 4 (1999): 35–40.
  4. L Levit and A Steinman, "It's the Hardware. No, Software. No, It's ESD!" Solid State Technology 42, no. 5 (May 1999 Supplement): 7–12.
  5. DW Cooper et al., "Controlling Electrostatic Attraction of Particles in Production Equipment," Semiconductor International 22, no. 7 (1999): 149–156.  

Jack Menear is a senior analytical scientist at Jack Menear Associates (Santa Cruz, CA). Arnold Steinman is the chief technology officer at Ion Systems Inc. (Berkeley, CA)