Radiated-Emissions Problems with Digital Clocks above 100 MHz

Michel Mardiguian

Full attenuation of increased emissions caused by high-frequency clocks depends on box shielding, careful PCB design, and IC component selection.

With digital clock frequencies in excess of 100 MHz, radiated emissions become more of a problem. The burgeoning of electronic devices using clocks with such high frequencies makes compliance with civilian and military radiated-emissions limits increasingly difficult to achieve. Basic EMC concepts remain the same, but certain design habits and problem-solving tricks developed in the mid-1980s need to be rethought. For instance, experienced EMC practitioners used to consider, for good reasons, that I/O cables would be the principal contributors to equipment radiation by virtue of their length. The radiation from PCB traces would be second order and could generally be neglected. But this is no longer true. Above approximately 200 MHz, that is, the frequency where a quarter-wavelength becomes shorter than 37 cm (or 15 in.), the fortuitous antennas formed by the external cables become less and less efficient while 10- to 30-cm-long PCB traces are competing with them, followed closely by the radiation from the largest modules above 500—600 MHz, such as multichip modules (MCMs) and application-specific integrated circuits (ASICs).

This situation calls for a serious look at EMI reduction techniques. Drastic precautions are now necessary at the PCB layout and component level, but even these may not suffice to keep emissions below the required FCC or European limits or within military specifications. With densely populated boards often carrying more than 500 nets, the flair and experience of the router are not sufficient unless a large number of layout iterations is acceptable. In-depth EMI analysis of the PCB is needed, sometimes with the assistance of specific CAD tools. Further, box shielding, which large-scale production enterprises might prefer to avoid, is becoming an inevitable complementary facet of PCB radiation control.

How Higher Frequencies Affect Radiation

For a pair of wires or traces, or a loop, as long as the distance d from the source is greater than 48 Fmhz, the maximum radiated electric field is given by the equation

E = 1.3 • I • A • f^²
d

where E is the field strength in microvolts per meter, I the loop current in amperes, A the loop area in square centimeters, f the frequency in megahertz, and d the distance from the source to the receiving antenna in meters. The loop current can be obtained from the harmonic of loop-driving voltage, at frequency f, divided by the total load formed by the impedance of the wires (traces) and the termination impedance. Despite the nonhomogeneity of its units, this formula is very practical because it fits the dimensions dealt with in PCB design.^¹

As frequency increases, the f² law applies until the largest, and then the smallest, side of the loop equals l/4, a point in frequency where the maximum radiation efficiency is reached and will not increase any further.

As an example, let us take a single 5 x 2-cm loop, typical of a two-way trip on a single-layer board with no ground plane, and factor in the Vcc and ground leads of a 20-pin package and its power-supply-decoupling capacitor (see Figure 1). The clock signal (or a quasi-periodic signal of 0-1-0-1-0-. . .) is the 30-MHz pulse train driven in the loop. The waveform of the periodic capacitor-discharge current is also shown in Figure 1b.

Figure 1. Circuit of a 30-MHz loop, with associated waveform and calculated Fourier spectrum.

The load of this circuit is not easy to model, because the input of the driven module is mostly nonlinear. Simplifying assumptions can be made, however, if only an order of magnitude is required, say, a result within ±10 dB. Either the line can be considered as terminated by the parallel resistance-capacitance formed by the dynamic resistance of a logic-gate input around its switching point, shunted by the 3- to 5-pF gate-input capacitance, or else the approximately 150-W termination resistance formed by the combination of pull-up and pull-down resistors can be taken (dynamically, the pull-up resistance on the +Vcc is in parallel with the pull-down one during a low-to-high transition).

Plot line A in Figure 2 gives a profile of the electric field from such a simple circuit, at a 3-m distance against the FCC Class B limit. It is clear that the PCB alone is almost in spec, and that with minimum effort it can be made compliant without the use of shielding. A specification violation could come from cable radiation, if spurious residues of this 30-MHz signal are driven, by common mode, through some I/O port. Plot B, by contrast, shows that changing the clock frequency to 250 MHz with a corresponding change in transition times (the rise time is down to 0.6 nanoseconds) brings a tremendous jump in the radiated spectrum, now 30 dB above the specified limit.

Ways to Eliminate or Reduce Excessive Radiation

To fairly compare PCBs of the mid-1980s and today's state of the art, some technological advances must be taken into account:

Multilayer boards, which become mandatory, for functional reasons, when rise times are shorter than about 3 nanoseconds. (Even for limited path length, signals above 100 MHz would not be run on boards without a ground plane.)
Surface-mount technology (SMT) or low-profile packages, chip carriers with a built-in decoupling capacitor or an SMT capacitor right underneath the module on the solder side. As shown in Figure 2, these improvements are bringing the radiation from plot B down to plot C.
Complex functions being gathered in a single ASIC, digital signal processor, or similar device, thus eliminating designs characterized by several scattered peripheral circuits.
Edge cleanup for high-data-rate I/O ports (minimum bouncing and oscillations).


Figure 2. Maximum calculated radiation for the circuit of a 30-MHz loop, single-layer board (plot A); the same layout, but with the clock frequency increased to 250 MHz (plot B); and the same circumstances as B, but with improved device packaging (plot C).

Discounting any possible external cable contribution, Figure 3 shows the radiated field for a single-layer PCB with 10 synchronous 30-MHz circuits like the one in Figure 2 (plot A), the same board with the 10 circuits changed to 250 MHz with SMT modules, SMT capacitors, and a multilayer board as packaging improvements (plot B). It can be seen that, in spite of the substantial reduction in emissions brought about by the packaging improvements, the 10-circuit-PCB radiation alone exceeds the Class B limit by approximately 30 dB. What options for cutting down this spec violation exist?

Figure 3. Maximum calculated radiation for 10 synchronous 30-MHz circuits as in Plot A of Figure 2 (plot A) and for 10 250-MHz cicuits with improved device packaging (plot B).

Selecting EMI-Quiet ICs. Several IC manufacturers, aware of these problems, started a decade ago to design their chips in terms of EMC. They reduced the loop area in the package through alterations in the die and bonding methods; increased the number of V_cc and ground pads and distributed them more evenly; softened transition times for all chip I/O interfaces that do not absolutely require steep fronts; and employed die-down mounting on the substrate to make the leads even shorter.² The tendency toward lower voltage excursions (0-to-1 transitions), such as 1.5 or 2 V, also contributed to lower emissions. All these efforts are supported and documented by now-standard methods for the characterization of chip emissions, including close-in measurements with a miniature H-field probe, measurement of I/O pin transitional currents by means of a 1-W shunt, and radiated-power measurement through use of a miniature coaxial chamber (transverse electromagnetic cell).^{^3,4,5}

This EMC-on-the-chip approach reminds one of the days when EMC engineers had to struggle to convince PCB designers to apply EMC analysis at their stage of product development.

Design Precautions at the PCB Level. The main reason for the problematic emissions jump is that, for a loop, radiation efficiency increases with f², while the clock voltage or current spectrum decreases only at 1/f, until the second-corner frequency of the Fourier spectrum envelope F^₂ is reached. Since F^₂ equals 1 divide by pi times the rise time, when the rise time gets as short as 0.7—1 nanosecond, F^₂ is shifted up to 350—400 MHz. The field radiated by clock harmonics keeps increasing with frequency, something not seen with rise times of 10 nanoseconds. Above F^₂, the voltage spectrum envelope decreases at 1/f². Thus, the radiated spectrum becomes nearly flat with frequency, which is still a problem and often puzzles the design engineer. Only when the radiating trace length reaches l/4 does the radiated spectrum decrease.

Therefore, the following classical PCB EMC guidelines must be applied even more rigorously, assuming, of course, that the PCB is a multilayer type.

Rule 1, pertaining to guard traces. Any 150-MHz or higher-frequency clock running for more than about 1 cm on the surface layer must be guarded on both sides by grounded traces. The guard traces must connect both ends to the ground plane. For the sake of EMI reduction, this clock trace should not be buried in the ground plane. Such a design might reduce the clock radiation itself, but at the expense of creating a very dangerous slot in the reference plane, increasing crosstalk and ground noise for the entire board. The edge-to-edge distance between source and guard traces should be kept to one-half or one-third the height above the ground plane (see Figure 4).

Figure 4. Guarding clock traces and PCB edges.

Rule 2, pertaining to the guard ring. If signal traces are routed on external sides (meaning that the V^_cc and ground are inner layers), the signal layers must be edge-guarded by a perimeter ground trace connected periodically to the ground plane by via-holes. This guard ring should be as integral as feasible; it prevents radiation from the traces that are near the board edges, and it neutralizes the fringe effects at a place where the ground plane is no longer acting as the quasi-infinite ground that was assumed.

Rule 3, regarding bonding to mechanical ground. Close to the I/O connectors, some direct connection of the PCB ground (0-V reference) to a mechanical ground (chassis, metal plate, or similar) must be provided. Reliance on a daughter card connector pin or a jumper wire for such bonding is not recommended; above 100 MHz this would be anything but equipotential. At least two solid contact points for each I/O connector should be provided. If screw-and-washer is not practical, spring fingers should be used. They must be stiff and provide good contact pressure.⁶

Rule 4, regarding output-ports decoupling. Simple capacitors must not be relied upon for cleanup or edge smoothing. They would do the job, but at the expense of increasing the high-frequency current returning to the driver via the ground plane, and increasing the V^_cc noise as well. These output capacitors should always be teamed up with some resistance (47 to 330 W or SMT ferrite bead at the device's output.

Greater Reliance on Shielding. The precautions just discussed can produce only a 10- to 15-dB reduction, so an additional 20- to 25-dB effort is needed to bring emissions below the Class B limit with some minimum margin. Here, shielding comes into play. If only one or a few radiation culprits have been identified, for instance, a large MCM with more than 100 pads and a higher than 100-MHz clock, and if the PCB around it has been treated with maximum care, then it can be assumed that such a module or modules alone may have caused a spec violation (see Figure 5). It may be tempting in terms of cost to can the suspect modules in a dedicated metal housing of copper or nickel-plated steel. Such housings are available for most standard IC sizes. This option may make treatment of the whole equipment enclosure as a Faraday cage unnecessary, but with these small five-sided cans leakage or penetration through the shield is possible—for example, where the power leads pass to the miniature fan that is cooling the module. Large openings in the PCB ground plane directly underneath the module can also destroy shield efficiency, by letting radiation through this "bottomless" box.

Figure 5. An example of measured near H-field radiation from a large module (a 200-MHz Pentium). If this result is translated into the equivalent E-field at 30 m, the Class B limit is exceeded by the module alone.

If too many PCB elements are candidates for radiation, the partial shielding option becomes impractical and it is time for integral shielding. Designers have tried to stay away from the Faraday cage approach, and have been successful when the EMI spectrum was contained within 300—400 MHz. But this is almost impossible now, at least with the fast processors. A quick look inside post-1994 PCs reveals that, under a cosmetic plastic cover, there is a second skin in the form of either an embossed metal foil or a solid metal enclosure. For all the critical zones, then, it is necessary to control the openings and seams so that they provide the desired additional 20 dB of attenuation up to about 1 GHz. The shielding used will need to display the following characteristics with respect to materials of construction and structural openings.

The material. Practically any metal thicker than 0.1 mm (4 mil) is adequate, so the choice is driven mostly by manufacturing considerations. Care must be taken, nevertheless, that there be good surface conductivity in the assembly zones and bonding areas (such as filters and metallic connectors). If a plastic housing is to be metallized by coating or deposit, a surface resistance of less than 0.5 W/sq should be the target. This will save some budget margin for the unavoidable leakages.

Functional openings. Round, square, or rectangular holes near the hot spots (e.g., noisy IC modules, power-cord-entry and filter mountings, I/O cable entries and their connectors) should not exceed about 15 mm (0.6 in.) in any dimension. If they need to be larger, they must be equipped with grid, mesh, or some other type of partition.

Fortuitous openings. Nonpurposeful openings, generally assembly seams, should not exceed about 50 mm (2 in.) between screws or welding spots. Seam height should be held to 0.1 mm (4 mil). If this cannot be achieved, for example, where a panel must be removed often, an EMC gasket in the form of a continuous core or rows of spring fingers should be used.

Watching I/O Cable Penetrations. Above 30—40 MHz, it takes only about 1 mV of common-mode excitation to drive a bulk current of 3—5 µA into an external cable 1.50 m long or longer and reach the FCC Class B limit.

Low-speed I/O ports are easy to free from undesirable RF effects, at the PCB exit or by using filtered connector receptacles.

Problems arise with faster I/Os operating above 10 MByte/sec, such as RS-485, differential SCSI, and IEEE 1394 types (see Figure 6). Here, classical filtering is impossible because it would cut into the useful spectrum. Reliance must be placed on common-mode killers that do not impair differential signals while being efficient in the VHF-UHF range—these include balancing transformers (baluns) and multihole ferrites—and on shielded cables with an excellent degree of symmetry. These two elements are not particularly compatible, however.

Figure 6. Radiation from a PCB and a 1.50-m-long cable compared. The cable is a low-speed (500-KByte) interface, carrying typical clock residues with a peak amplitude of approximately 30 mV. (a) The PCB clock is 30 MHz. The cable radiation largely dominates the E-field spectrum up to 300 MHz, and is the essential cause of spec violation. (b) The clock is changed to 150 MHz. This time, the PCB radiation competes with the cable radiation, becoming the dominant violator above 300 MHz. These data are a calculated extrapolation.

Conclusion

The use of high-frequency clocks in electronic devices increases radiated emissions, especially at the highest frequencies. PCBs, which had been second-order radiators, are becoming major antennas for the portion of spectrum above 300 MHz, followed closely by the large IC modules themselves at 500—600 MHz and higher. A jump of about one order of magnitude in clock frequency is making sharp vigilance in PCB design necessary and considerably increasing shielding requirements. Some benefits have been gained from good board techniques and such packaging improvements as surface-mount technology and multilayer boards, but shielding must be applied to achieve full attenuation. These shielding needs must be carefully analyzed up front to avoid having mechanical designers making late and economically painful discoveries.

References

M Mardiguian, Controlling Radiated Emissions (Kluwer Academic Press: 1992, 2000).
HW Lutjens, "Reducing EM Emissions of Micro Controllers" (paper presented at the Componic Conference, Paris, 1993).
JP Muccioli, "Near-Field Emissions from µControllers," EMC Test & Design, November 1993:14.
JP Muccioli and K Slattery, "RF Emissions from a Family of µP" (paper presented at the IEEE-EMC Symposium, Austin, 1997).
"Measurements of IC radiated emissions," SAE Standard J1752/3, Society of Automotive Engineers.
M Mardiguian, EMI Troubleshooting Techniques (McGraw-Hill: 1999).

Michel Mardiguian is an EMC consultant based in St. Remy, France.